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Delay Insentitive Circuits -- Structures, Semantics, and Strategies
ABOUT BOOK
The design of concurrent distributed hardware systems is a major challenge for engineers today and is bound to escalate in the future, but engineering education continues to emphasize traditional tools of logic design that are just not up to the job. For engineers tackling realistic projects, improvised attempts at synchronization across multiple clock domains have long been a fact of life. Prone to hazards and metastability, these ad hoc interfaces could well be the least trustworthy aspects of a system, and typically also the least able to benefit from any readily familiar textbook techniques of analysis or verification.